This invention relates, generally, to semiconductor processing and devices and, more specifically, to system on chip technology.
Typically, when forming core devices and I/O devices on the same chip, the two devices are formed in separate wells in order to account for the devices"" differences in threshold voltage (VT). A core device uses a lower VT as compared to the I/O devices. The use of separate wells increases processing complexity by increasing the number or masks used during manufacturing of integrated circuits (ICs).
When an analog device is needed on the chip, a core device is used for this function because the power supply for the analog device is typically the same as that for the core device if low voltage operation is required. Typically, the core device will be modified to increase the gate length of the transistor to account for the stricter requirements of linearity, for example, of the analog device. Since core devices typically have halo implants, the output conductance of such a device is too great for an analog device. At a given gate voltage, the current will continue to increase with increasing drain voltage in the saturation regime due to the halo implants.
Therefore, a need to decrease the processing complexity of integrating core devices and I/O devices on the same chip is needed. In addition, an integration scheme with improved analog devices is also needed.